Dec 9, 2015

Temperature, humidity, and bias acceleration model for a GaAs pHEMT process


This paper investigates the moisture failure acceleration factors for a GaAs pHEMT process
The activation energy Ea and the moisture accelerating factor n were extracted
Ea and n were shown to be different from those previously reported for Si devices and for another GaAs pHEMT process
The impact of bias was studied and incorporated into a humidity-induced failure model containing Vgs dependence
The failure mode was studied and reported as a transistor failure due to corrosion of the contacts
Comparison between THB and HAST testing was made for different processes


This paper investigates the moisture failure acceleration factors for a GaAs pHEMT process. The activation energy Ea and the moisture accelerating factor n were extracted and were shown to be different from those previously reported for Si devices and for another GaAs pHEMT process. The impact of bias was studied and a humidity-induced semiconductor failure model, incorporating bias acceleration, was proposed.


Nov 18, 2015

Processing and characterization of epitaxial GaAs radiation detectors


X-ray detectors made on thick epitaxial GaAs were successfully processed.
CVPE technique was used to grow high purity epi-GaAs with over View the MathML source layer thickness.
Leakage current density of about 10 nA/cm2 indicates high purity of the epi-layer.
DLTS shows a significant concentration of deep level electron traps in the epi-layer.
TCAD simulations with a deep level trap in the epi-layer reproduce the measurements.


GaAs devices have relatively high atomic numbers (Z=31, 33) and thus extend the X-ray absorption edge beyond that of Si (Z  =14) devices. In this study, radiation detectors were processed on GaAs substrates with View the MathML source thick epitaxial absorption volume. Thick undoped and heavily doped p+ epitaxial layers were grown using a custom-made horizontal Chloride Vapor Phase Epitaxy (CVPE) reactor, the growth rate of which was about View the MathML source. The GaAs p+/i/n+ detectors were characterized by Capacitance Voltage (CV), Current Voltage (IV), Transient Current Technique (TCT) and Deep Level Transient Spectroscopy (DLTS) measurements. The full depletion voltage (Vfd) of the detectors with View the MathML source epi-layer thickness is in the range of 8–15 V and the leakage current density is about 10 nA/cm2. The signal transit time determined by TCT is about 5 ns when the bias voltage is well above the value that produces the peak saturation drift velocity of electrons in GaAs at a given thickness. Numerical simulations with an appropriate defect model agree with the experimental results.


  • GaAs
  • Solid state radiation detectors
  • Wafer processing
  • Defect characterization;
  • TCAD simulations

Nov 3, 2015

GaAs photovoltaics and optoelectronics using releasable multilayer epitaxial assemblies

Compound semiconductors like gallium arsenide (GaAs) provide advantages over silicon for many applications, owing to their direct bandgaps and high electron mobilities. Examples range from efficient photovoltaic devices to radio-frequency electronics and most forms of optoelectronics. However, growing large, high quality wafers of these materials, and intimately integrating them on silicon or amorphous substrates (such as glass or plastic) is expensive, which restricts their use. Here we describe materials and fabrication concepts that address many of these challenges, through the use of films of GaAs or AlGaAs grown in thick, multilayer epitaxial assemblies, then separated from each other and distributed on foreign substrates by printing. This method yields large quantities of high quality semiconductor material capable of device integration in large area formats, in a manner that also allows the wafer to be reused for additional growths. We demonstrate some capabilities of this approach with three different applications: GaAs-based metal semiconductor field effect transistors and logic gates on plates of glass, near-infrared imaging devices on wafers of silicon, and photovoltaic modules on sheets of plastic. These results illustrate the implementation of compound semiconductors such as GaAs in applications whose cost structures, formats, area coverages or modes of use are incompatible with conventional growth or integration strategies.

Figure 1Schematic illustration, optical and SEM images, and SIMS profile of GaAs/AlAs multilayers.

Schematic illustration, optical and SEM images, and SIMS profile of GaAs/AlAs multilayers.
a, Schematic illustration of a multilayer stack of GaAs/AlAs and schemes for release through selective etching of the layers of AlAs. b, Corresponding SIMS profile of this stack. c, Cross-sectional SEM image after partial etching of the…

igure 2Multilayer GaAs MESFETs and logic circuits.

Multilayer GaAs MESFETs and logic circuits.
a, Schematic illustration of a GaAs MESFET on a polyimide (PI) coated glass substrate.b, Optical image of arrays of MESFETs on glass substrate. Inset, a single MESFET with source (S), drain (D) and gate (G) metal layers. cVDS (drain–…

Figure 3Multilayer GaAs NIR imagers.

Multilayer GaAs NIR imagers.
a, Schematic illustration of a GaAs metal–semiconductor–metal (MSM) NIR detector on a Si wafer coated with a photocurable polyurethane (PU). Inset, Schottky blocking diode (SD). b, Optical image of a NIR imager consisting of a 16×16 a…

Figure 4Multilayer GaAs single-junction solar cells.

Multilayer GaAs single-junction solar cells.
a, Schematic illustration of GaAs single-junction solar cell on a PET substrate coated with a photodefinable epoxy. b, Optical image of arrays of such devices formed on the source wafer. Inset, magnified view of top (n-type) and bottom…

Oct 22, 2015

III-V/Si hybrid photonic devices by direct fusion bonding


Monolithic integration of III-V compound semiconductors on silicon is highly sought after for high-speed, low-power-consumption silicon photonics and low-cost, light-weight photovoltaics. Here we present a GaAs/Si direct fusion bonding technique to provide highly conductive and transparent heterojunctions by heterointerfacial band engineering in relation to doping concentrations. Metal- and oxide-free GaAs/Si ohmic heterojunctions have been formed at 300°C; sufficiently low to inhibit active material degradation. We have demonstrated 1.3 μm InAs/GaAs quantum dot lasers on Si substrates with the lowest threshold current density of any laser on Si to date, and AlGaAs/Si dual-junction solar cells, by p-GaAs/p-Si and p-GaAs/n-Si bonding, respectively. Our direct semiconductor bonding technique opens up a new pathway for realizing ultrahigh efficiency multijunction solar cells with ideal bandgap combinations that are free from lattice-match restrictions required in conventional heteroepitaxy, as well as enabling the creation of novel high performance and practical optoelectronic devices by III-V/Si hybrid integration.

III-V semiconductor compound light sources integrated onto Si chips or waveguides are promising for the realization of photonic integrated circuitsutilizing well-established complementary metal-oxide-semiconductor (CMOS) fabrication technologies. Such III-V/Si hybrid devices would compensate for the poor ability of silicon to act as a light source due to its low radiative recombination rate stemming from indirect energy bandgaps. For solar cell applications, Si-based multijunction stacking would provide high efficiency, low cost, mechanical robustness and light weight cells, relative to conventional Si and III–V multijunction cells. Additionally, heterojunction tunnel field-effect transistors consisting of low bandgap III–V semiconductors and Si are promising for the realization of high-density, low-power-consumption very-large-scale-integration (VLSI) by enhanced drive current relative to conventional Si-only transistors. For III–V/Si hybrid integration, direct epitaxial growth of III–V compounds on Si substrates would be the most desirable approach, but heteroepitaxy typically introduces a substantial crystalline defect density due to the large lattice mismatch and the polar-nonpolar nature of the III–V/IV semiconductor system that can adversely affect device performance. Wafer bonding, on the other hand, is not subject to the lattice matching limitations associated with epitaxial growth, and heterostructure devices fabricated via wafer bonding can, in principle, have a performance close to those obtained by homoepitaxy by confining the defect network needed for lattice mismatch accommodation to the bonded interfaces. It is known that ohmic Si/Si junctions of the same polarity, i.e. p-Si/p-Si and n-Si/n-Si, can be relatively easily obtained by direct wafer bonding even at room temperature. It is, however, not the case for compound semiconductors such as GaAs and InP, and ohmic p-type/p-type or n-type/n-type junction formation has required high temperature bonding above 600°C which would severely degrade the device materials. For GaAs/Si bonding that would be particularly attractive for fabrication of high performance photonic and photovoltaic devices, no successfully direct-bonded ohmic junctions have been reported, and bonding even at 700°C was reported to have failed. Although an alternative method to prepare ohmic heterointerfaces uses metal bonding agents, the bonding metal layers would shadow light as well as cause photon absorption loss and, therefore, is not ideal for optoelectronic applications. In this work, we have succeeded in preparing ohmic GaAs/Si heterojunctions, to realize both optical transparency and electrical conductivity, by direct bonding at 300°C in ambient air for p-GaAs/p-Si homopolarity-junctions and p-GaAs/n-Si tunnel-junctions by applying heavy, degenerating doping at the GaAs and Si surfaces to be bonded to enhance the GaAs/Si interfacial conductivity.


GaAs/Si direct fusion bonding

We investigated experimentally the bonding of GaAs and Si wafers with varying doping concentrations and bonding temperature, and we characterized the GaAs/Si heterointerfacial electrical conductivities. The doping concentrations of the p-GaAs wafers, p+-GaAs layers, p+-Si, and n+-Si wafers were 9×1018 cm−3 Zn, 5×1019 cm−3 Zn, 3×1019 cm−3 B, and 3×1019 cm−3 As, respectively. Current-voltage (I-V) curves, under the measurement configuration shown schematically in Fig. 1a, for the bonded GaAs/Si wafer pairs are shown in Fig. 1b and 1c. Rectified, non-ohmic behaviour is seen for all p-GaAs/p+-Si and p-GaAs/n+-Si pairs including those annealed at 500°C. In contrast to the non-ohmic I–Vcharacteristics for the p-GaAs/p+-Si and p-GaAs/n+-Si pairs, the p+-GaAs/p+-Si and p+-GaAs/n+-Si pairs exhibit ohmic I–V curves as seen inFig. 1b and 1c. A cross-sectional transmission electron microscope image at a direct-bonded p+-GaAs/p+-Si heterointerface is shown in Fig. 1f. An amorphous layer at the GaAs/Si interface with a thickness of around 2 nm can be seen in the image. Even if this interfacial layer is an oxide, this thickness is sufficiently thin to provide ohmic interfacial conductivity by inducing a tunnelling current or by oxide breakdown by the applied voltage. Selected-area diffraction patterns at and around the GaAs/Si heterointerface, shown in Fig. 1g–i, verify that the regions immediately above and below the amorphous layer are single-crystalline GaAs and Si, respectively. The images indicate that both the GaAs and Si materials remain single crystals during our bonding process with no threading dislocation generation observed around the vicinity of the bonded heterointerface. This is in contrast to interfaces in the cases of lattice-mismatched heteroepitaxy.

Figure 1: GaAs/Si direct wafer bonding.
Figure 1
(a) Configuration schematic of the I–V measurement for the direct-bonded GaAs/Si heterointerfacial electrical characteristics. A positive bias voltage was applied from the GaAs side. (b, c) I–V characteristics of the direct-bonded GaAs/Si heterointerfaces with varying doping concentrations and bonding temperature. (d, e) Calculated profiles of the conduction and valence band edges across the (d) p-GaAs/p-Si and (e) p-GaAs/n-Si heterointerfaces with varying doping concentrations. The inset in e shows a closeup around the origin. (f) Cross-sectional transmission electron microscope image of a direct-bonded p+-GaAs/p+-Si heterointerface. (g–i) Selected-area diffraction patterns at the same heterointerface as of f for regions around 70 nm in radius centred (g) 80 nm above the interface, (h) at the interface, and (i) 80 nm below the interface, identified as single-crystal GaAs, a mixture of single-crystal GaAs and Si, and single-crystal Si, respectively.
Full size image

III–V quantum dot lasers on Si substrates

As a demonstration of our GaAs/Si direct bonding technique applied to optoelectronic devices, we have fabricated semiconductor lasers using self-assembled InAs quantum dots embedded in GaAs (InAs/GaAs quantum dot lasers) on Si substrates and operated by current injection through direct-bonded GaAs/Si heterointerfaces. A double-hetero InAs/GaAs quantum dot laser structure was grown on a GaAs substrate by molecular beam epitaxy and layer-transferred onto a p+-Si substrate by means of p+-GaAs/p+-Si direct bonding at 300°C and subsequent removal of the GaAs substrate. The finished device consists of a 3.9-μm-thick III-V semiconductor double-hetero laser structure on top of a Si substrate, as shown in Fig. 2a and 2b. Fig. 2c shows the light-current characteristics of the fabricated device under 500 Hz, 400 ns pulsed pumping at room temperature. The clear kink in the light-current curve indicates the lasing turn-on with a threshold current density of 205 A cm−2; the lowest threshold current density, to the best of our knowledge, of any kind of laser on Si. The inset of Fig. 2c shows the I–Vcharacteristics of the laser. The resistivity in the linear I–V region at higher voltages is around 0.1 Ω cm2, which is the same order of magnitude as the bonded p+-GaAs/p+-Si bare wafer heterointerface shown in Fig. 1b. Fig. 2d and 2e show the electroluminescence spectra at current densities of 140 and 380 A cm−2, corresponding to spontaneous and lasing emission, respectively. Room temperature lasing at the 1.3 μm optical communication band, associated with the ground state transition of the InAs quantum dots, is observed. Additionally, an onset of room temperature continuous-wave lasing has been observed in a same type of sample (see Supplementary Information).

Figure 2: InAs/GaAs quantum dot laser on Si substrate.
Figure 2
(a) Cross-sectional schematic diagram of the fabricated InAs/GaAs quantum dot laser on a Si substrate. The thickness and doping concentration of each layer are indicated. The abbreviations QD and ND stand for quantum dot and non-doped, respectively. (b) Cross-sectional transmission electron microscope image of the laser. The upper inset shows a detailed image of the InAs/GaAs quantum dot layers. The lower inset shows an atomic force microscope image of the as-grown InAs/GaAs quantum dots. (c) Light-current characteristics of the laser for pulsed electrical pumping at room temperature. The I–V characteristics of the laser are shown in the inset. (d, e) Electroluminescence spectra of the laser at current densities of 140 (below the lasing threshold) and 380 (above the lasing threshold) A cm−2, respectively.
Full size image

III–V/Si multijunction solar cells

We have also fabricated AlGaAs/Si dual-junction solar cells using the direct bonding technique. An Al0.1Ga0.9As subcell was grown on a GaAs substrate by molecular beam epitaxy and layer-transferred onto a Si subcell by means of the p+-GaAs/n+-Si direct bonding at 300°C and subsequent removal of the GaAs substrate. Fig. 3a and 3b show a cross-sectional schematic diagram and scanning electron microscope image of the fabricated AlGaAs/Si dual-junction solar cell, respectively. Both the Al0.1Ga0.9As and Si subcells had n-on-p structures, and the bonding of the p+-GaAs/n+-Si heterointerface acts as a tunnel junction to switch the polarity. The light I–V and power-voltage characteristics of the solar cell under a 600 nm-peaked halogen white light source of a one-sun intensity (100 mW cm−2) are shown in the inset of Fig. 3b. The device performance parameters for this solar cell are Jsc = 27.9 mA cm−2Voc = 1.55 V, FF = 0.58, and η = 25.2%, where JscVocFF and η are the short-circuit current, open-circuit voltage, fill factor and energy conversion efficiency, respectively.

Figure 3: AlGaAs/Si dual-junction solar cell.

Figure 3
(a) Cross-sectional schematic diagram of the fabricated AlGaAs/Si dual-junction solar cell. The thickness and doping concentration of each layer are indicated. The abbreviation BSF stands for back surface field. (b) Cross-sectional scanning electron microscope image of the solar cell. Inset shows the light I–V and power-voltage characteristics of the solar cell under a 600 nm-peaked halogen white light source of a one-sun intensity (100 mW cm−2).
Full size image
The electrical conductivity dependence on bonding temperature seen inFig. 1b and 1c does not show monotonic behavior, attributed to the trade-off between conductivity increase and decrease by formation of covalent bonds and thermal expansion mismatch between GaAs and Si at higher temperature, respectively. Interfacial oxide formation might also be a cause of higher interfacial resistivity at higher temperature for our wafer bonding process in ambient air. It should be also noted that the wafer bonding process basically contains some randomness in reproducibility for the bonded interfacial properties degradable for example even by a single particle accidental incorporation into the interface. The conductivity enhancement seen in Fig. 1b and 1c can be explained through an analysis of the heterojunction band offset at the GaAs/Si interfaces. One-dimensional simulations of the heterojunction bandbending (PC1D software, University of New South Wales) indicate thinning of the potential barrier at the valence band edge due to the change of the doping concentration in GaAs from 9×1018 cm−3 to 5×1019 cm−3 for the p-type/p-type pairs as seen in Fig. 1d, leading to the interfacial electrical conductivity enhancement. On the other hand, simulations indicate tunnel junction formation due to the same change in doping concentration in GaAs for the p-type/n-type pairs as seen inFig. 1e. This valence-band-edge rising on the GaAs side enables tunnelling carrier transport, leading to higher conductivity and ohmic characteristics across the heterojunction interfaces. These p-type/p-type and p-type/n-type GaAs/Si ohmic heterojunctions are very suitable for next-generation III-V/Si hybrid optoelectronic devices that will enable both optical and electrical interconnections.
We have fabricated hundreds of lasers in a single wafer bonding step demonstrating the advantage of this approach for high volume, low cost integration over the conventional pick-and-place scheme. Evanescent optical coupling to underneath waveguides to fabricate so-called hybrid Si lasers could be realized by preparing rib structures on commercially available silicon-on-insulator substrates in advance of wafer bonding. In contrast to oxide-mediated bonding used for hybrid laser fabrication to date, conductive wafer-bonded heterointerfaces enable vertical carrier injection that prevents current spreading towards cavity stripe edges. Therefore, direct-bonded hybrid lasers have the advantages of higher quantum efficiencies and simpler fabrication without mesa etching or ion implantation for carrier confinement that was required in the fabrication of earlier lateral-current-injection III-V/Si hybrid lasers.
The low FF seen in Fig. 3b is likely due to the large series resistance. However, the wafer-bonded GaAs/Si heterojunction interfacial resistance with exactly same doping concentrations in GaAs and Si to those used for the bonding surfaces in the dual-junction solar cell seen in Fig. 1c is far lower than the total series resistance of the dual-junction solar cell estimated from the light I–V characteristics. We therefore attribute the low FF principally to insufficient optimization of our front metal contact grids. Very high efficiency, over 30% under 1 sun, seems quite realistic simply through a contact redesign and would be expected based on the Jsc and Voc values obtained at this preliminary research stage. To the best of our knowledge, while there have been two reports for all-III–V bonded multijunction solar cells, this is the first bonded multijunction solar cell with a Si subcell. Our monolithic AlGaAs/Si dual-junction solar cell (overcoming a 4% lattice-mismatch between AlGaAs and Si) has demonstrated a proof-of-principle for the viability of direct wafer bonding for solar cell applications. This wafer-bonding interconnecting approach is extendable to ultrahigh efficiency multijunction solar cells, such as InGaN/AlGaAs/Si/Ge four-junction solar cells, with optimal subcell bandgap sequences free from the lattice-matching restriction required in conventional heteroepitaxy. In this work, we adopted an etch-back method to detach the GaAs growth substrate to simplify the fabrication process. Alternatively, the incorporation of an epitaxial lift-off or ion-cutting technique would enable the reuse of the GaAs substrates to reduce the production costs.
In conclusion, we have investigated GaAs/Si direct wafer bonding for electrically conductive, optically transparent materials interconnection in conjunction with heterointerfacial energy band alignment calculations in relation to doping concentrations. Heavy, degenerating doping at the GaAs and Si surfaces to be bonded is found to be significant for enhancing the GaAs/Si interfacial conductivity and results in ohmic GaAs/Si heterointerfaces even for bonding temperatures of as low as 300°C for both p-type/p-type and p-type/n-type combinations. Utilizing the p+-GaAs/p+-Si and p+-GaAs/n+-Si direct bonding, we have demonstrated a low threshold III–V laser on a Si substrate and a high-efficiency III–V/Si multijunction solar cell, respectively. Our low-temperature direct semiconductor bonding technique opens up a new pathway for realizing high-performance III–V/Si hybrid optoelectronics.

Wafer bonding and layer transfer

Bonding surfaces of the GaAs (100) and Si (100) wafers were first coated with a photoresist to protect the bonding surfaces from particles generated in the dicing process. The wafers were then diced into 1 cm2area dies. The photoresist was then removed with acetone, and the bonding surfaces were degreased. Native oxide was removed by dipping both the GaAs and Si wafer pieces in HF aq. (20 vol%) for 30 s. The two die pieces were then brought into contact with the (011) edges aligned, which is useful for cleavage in the laser fabrication, and annealed at 300–500°C in ambient air for 3 h under a uniaxial pressure of 0.1 MPa. The bonded GaAs/Si interfacial I–V characteristics were measured by a DC bias source with AuGeNi/Au ohmic contacts applied to the outer surfaces of the bonded GaAs/Si pieces. Bonded pairs with varying doping concentrations at the subsequent bond interfaces were investigated. Highly doped p+-GaAs layers were prepared by metallorganic chemical vapor deposition on the p-GaAs (100) wafers. The bonding yields in relation to surface roughness appear in Supplementary Information.
The laser and solar cell structures were layer transferred onto a p+-Si (100) substrate and Si solar cell wafer (details described in Multijunction solar cells section), respectively, through wafer bonding and subsequent removal of the GaAs substrate. After direct semiconductor wafer bonding at 300°C, the GaAs substrate was removed at room temperature by selective chemical etching with H3PO4-H2O2 (37 vol.) followed by 50% citric acid-H2O2 (41 vol.), with the edges of the GaAs wafer coated with photoresist to avoid undercutting of the quantum dot laser structure. The H3PO4-H2O2 and citric acid-H2O2 solution compositions were chosen to maximize the etching rate of GaAs and the etching selectivity between GaAs and AlGaAs, respectively4. The Al0.7Ga0.3As etch stop layer was then removed by HCl aq. (conc.) or HF aq. (20 vol%) at room temperature.

Quantum dot lasers

The InAs/GaAs quantum dot laser structure was grown on a GaAs (100) substrate by molecular beam epitaxy. The laser structure consisted of a 440-nm-thick GaAs layer embedded with ten layers of self-assembled InAs quantum dots with a density per layer of 3.8×1010 cm−2. The GaAs layer was clad with 1.4-μm-thick Al0.4Ga0.6As. An Al0.7Ga0.3As etch stop layer was grown between the GaAs substrate and the lower Al0.4Ga0.6As clad. The as-grown InAs quantum dots exhibited a photoluminescence peak associated with the ground state emission at 1.3 μm with a full width at half maximum of 30 meV at room temperature. Following the wafer bonding and layer transfer described above, broad-area Fabry-Perot lasers with cleaved facets were formed by applying Au/AuGeNi electrodes to the top and bottom of the structure. The finished device is a 3.9-μm-thick double-hetero laser structure bonded to a Si substrate with no mediating agent. The laser cavity length and width were 2.1 mm and 100 μm, respectively. A high-reflection coating was not applied to the cleaved edges.

Multijunction solar cells

The Al0.1Ga0.9As subcell, with a bandgap energy of 1.6 eV, was a p-nAl0.1Ga0.9As/Al0.7Ga0.3As double-hetero structure. The subcell was grown inversely as p-on-n on a GaAs (100) substrate by molecular beam epitaxy with an Al0.7Ga0.3As etch stop layer immediately above the GaAs substrate. This results in an n-on-p top subcell in the final bonded dual-junction cell structure. The Si subcell, with a bandgap energy of 1.1 eV, was prepared by thermal diffusion of P from phosphoric-acid-based glass into the surface region of a p-type Si (100) wafer. Specifically, the GaAs subcell was terminated with a Be-doped GaAs layer with a carrier concentration of 5×1019 cm−3, and the Si subcell was terminated with a P-doped Si layer with a carrier concentration of 1×1020 cm−3. These subcells were directly bonded and followed by GaAs substrate removal, metallization with Au/AuGeNi, and application of an antireflection coating with MgF2/ZnS.

Oct 9, 2015

Transforming the cost of solar-to-electrical energy conversion: Integrating thin-film GaAs solar cells with non-tracking mini-concentrators


Practical solar energy solutions must not only reduce the cost of the module, but also address the substantial balance of system costs. Here, we demonstrate a counter-intuitive approach based on gallium arsenide solar cells that can achieve extremely low-cost solar energy conversion with an estimated cost of only 3% that of conventional gallium arsenide solar cells using an accelerated, non-destructive epitaxial lift-off wafer recycling process along with a lightweight, thermoformed plastic, truncated mini-compound parabolic concentrator that avoids the need for active solar tracking. Using solar cell/concentrator assemblies whose orientations are adjusted only a few times per year, the annual energy harvesting is increased by 2.8 times compared with planar solar cells without solar tracking. These results represent a potentially drastic cost reduction in both the module and the balance of system costs compared with heavy, rigid conventional modules and trackers that are subject to wind loading damage and high installation costs.


concentrator; cost per Watt; epitaxial lift-off; plastic substrate; thin-film GaAs solar cell


Due to the nearly unlimited abundance of solar energy, photovoltaic cells that convert sunlight directly into electricity represent the most promising alternative energy source. However, cost-efficient solar-to-electrical energy harvesting remains a major hurdle that must be fully surmounted if we are to expect its eventual widespread deployment. Considerable efforts in developing photovoltaics have therefore focused on achieving low cost while increasing their power conversion efficiency (PCE).1,2,3,4 One recent achievement has been the demonstration of thin-film GaAs solar cells approaching their thermodynamic efficiency limit.5,6,7,8 However, the cost reduction long promised by the epitaxial lift-off (ELO) process has primarily been limited by the inability to fully recover the original wafer surface quality after each growth, leading to a limited number of times that the substrate can be recycled due to the accumulation of defects and to wafer thinning incurred by chemo-mechanical polishing.9,10,11,12,13Furthermore, high PCE alone does not necessarily translate into low-cost solar energy production when expensive active materials and fabrication processes are used in their manufacture. As an alternative to simply improving PCE, solar concentrators have been demonstrated as a means for reducing the use of costly active solar cell materials.14,15 However, most concentrators suffer from a significant roll-off in efficiency at large light incident angles and can also result in high cell operating temperatures, thereby necessitating expensive active solar tracking and solar cell cooling systems.16
Here, we demonstrate that thin-film GaAs solar cells produced by an accelerated non-destructive ELO (ND-ELO) fabrication process that are integrated with simple thermoformed mini-concentrators can lead to a dramatic reduction in the cost of the production of electricity via solar energy harvesting. This approach reduces cell material and fabrication costs to only 3% that of analogous substrate-based GaAs cells, and only 11% that of ELO-processed GaAs solar cells, while the optical system maximizes the annual energy output using highly truncated two-dimensional mini-compound parabolic concentrators (CPCs). This low-profile concentrator provides a very thin and lightweight module with improved off-angle sunlight absorption compared to conventional concentrators both in direct and in diffuse sunlight with only minor losses. Our approach, therefore, eliminates the need for high concentration factor optics that require expensive and heavy solar tracking paraphernalia. Furthermore, the unique geometry of thin-film GaAs solar cells mounted on a heat-sinking metal layer enables operation at or near room temperature without active cooling, even for concentration factors approaching 4×, representing a reduction of over 40 °C compared to substrate-based GaAs solar cells.


Epitaxial growth

The solar cell epitaxial layer structures are grown by gas-source molecular beam epitaxy (GSMBE) on Zn-doped (100) p-GaAs substrates. The growth starts with a GaAs buffer layer (0.2 µm thick) followed by InGaP/GaAs (100 nm/100 nm) protection layers and an AlAs (20 nm) sacrificial layer. Next, an inverted active device region is grown as follows: 5×1018 cm−3 Be-doped GaAs (0.15 µm) contact layer, 2×1018 cm−3 Be-doped Al0.20In0.49Ga0.31P (0.025 µm) window, 1×1018 cm−3 Be-doped p-GaAs (0.15 µm) emitter layer, 2×1017 cm−3 Si-doped n-GaAs (3.0 µm) base layer, 6×1017 cm−3 Si-doped In0.49Ga0.51P (0.05 µm) back surface field (BSF) layer and 5×1018 cm−3 Si-doped n-GaAs (0.1 µm) contact layer. The GaAs/AlAs layers are grown at 600 °C, and the Al0.20In0.49Ga0.31P/In0.49Ga0.51P layers are grown at 480 °C.

Pre-mesa patterning, cold weld bonding and epitaxial lift-off

Figure 1a shows the schematic illustration of the process flow for pre-mesa patterning, cold welding and ND-ELO. Mesas of 2.5 mm×6.5 mm Cr/Au (4 nm/350 nm) are patterned by photolithography using a LOR 3A and S-1827 (Microchem, Newtown, MA, USA) bi-layer photoresist as a mask and H3PO4:H2O2:deionized H2O (3125) and HCl:H3PO4 (31) as etchants for GaAs and InGaP, respectively. The patterned Au on the epitaxial GaAs wafer is bonded to the Au-coated 25 µm thick Kapton® sheet using an EVG 520 wafer bonder at ~10−5 torr. Then, a pressure of 4 MPa with an 80 N s−1 ramp rate is applied to the 2-inch-diameter substrate to establish a bond between the Au films. The temperature is increased to 230 °C at 25 °C min−1 and held at that temperature for 8 min. The substrate is then rapidly cooled. To apply uniform pressure, a soft graphite sheet is inserted between the sample and the press head. Once the GaAs substrate fully adheres to the Kapton® sheet, the thin active device region is removed from its parent substrate using ND-ELO.9 The sample is immersed in a 20% HF:H2O solution maintained at 60 °C while agitating the solution with a stir bar at 900 r.p.m. The total lift-off time is 30 min.
Figure 1.
Figure 1 - Unfortunately we are unable to provide accessible alternative text for this. If you require assistance to access this image, please contact or the author
Illustration and photographs of the fabrication steps for integration of CPCs with thin-film GaAs solar cells. (a) Proceeding left to right: Mesas are pre-patterned prior to the ND-ELO by selective etching that stops at the AlAs sacrificial layer (red). The sample is then bonded onto the Au-coated Kapton® sheet viacold-welding. The third step shows the sample following ND-ELO. (b) The PETG sheet is fixed on top of the metal mold and is then thermoformed into its final shape by applying heat and vacuum. Finally, the mini-CPCs are detached from the mold. (c) The solar cell-Kapton® sheet assembly is separated into individual bars using laser dicing. Then, each bar is transfer printed onto the mini-CPCs using a PDMS stamp via low-pressure cold-welding. The last schematic shows the integrated thin-film solar cells and mini-CPC after a reflective metal coating is deposited onto the CPC array surface. (d) Photographs of ① PETG sheet after thermoforming into CPCs, ② fabricated thin-film GaAs solar cells on a Kapton® sheet after mesa pre-patterning and ND-ELO, ③ thin-film GaAs solar cells following dicing, ④ separated and cleaned solar cell bars, ⑤ PDMS stamps and 3D printed mold used in transfer printing and ⑥ integrated thin-film GaAs solar cells integrated with plastic mini-CPCs. CPC, compound parabolic concentrator; ND-ELO, non-destructive epitaxial lift-off.
Full figure and legend (339K)

Solar cell fabrication

Following lift-off, the thin-film active region and flexible plastic host are fixed to a rigid substrate using Kapton® tape. The front surface contact grid is photolithographically patterned using the LOR 3A and S-1827 (Microchem) bi-layer photoresist; then, a Pd(5 nm)/Zn(20 nm)/Pd(20 nm)/Au(700 nm) metal contact is deposited by e-beam evaporation. The widths of the grid and bus bar are 20 µm and 150 µm, respectively, and the spacing between the grid fingers is 300 µm. The total coverage of the solar cell active area by the metallization is 4%. After the metal layer is lifted off, the highly doped 100 nm p++ GaAs contact layer is selectively removed by plasma etching. The thin-film solar cells are annealed in air for 1 h at 200 °C to form ohmic contacts. An anti-reflection coating bilayer composed of 49 nm thick TiO2 and 81 nm thick MgF2 is deposited by e-beam evaporation. The solar cells on the plastic sheet are covered by a plastic film to protect them from debris generated during dicing along the etched trench using a CO2 laser cutter (50 W; Universal Laser Systems, Scottsdale, AZ USA) with 2.5 W power and 500 pulses per inch (see Supplementary Information SI 1 andSupplementary Movie, laser cutting, for details).

Vacuum-assisted thermoforming of the CPCs

Figure 1b shows the schematic illustration of the vacuum-assisted thermoforming process for CPC fabrication. The polyethylene terephthalate glycol-modified (PETG) sheet is fixed with Kapton® tape across the top of a metal mold containing holes at its base. While vacuum is applied through the holes, the assembly is placed in an oven at 60 °C. The PETG is drawn into the mold as the oven temperature is raised to 96 °C for ~15 min, forming a compound parabolic shape. The CPC is then cooled, after which the CPC is detached from the metal mold.

Characterization of the concentrated GaAs photovoltaic

An Oriel solar simulator (model: 91191) with a Xe arc lamp and an AM 1.5 Global filter is used for I-V measurements obtained with an Agilent 4155B parameter analyzer. The simulator intensity is calibrated using a National Renewable Energy Laboratory (NREL)-certified Si reference cell with a diameter of 5 mm. The light incident angle is adjusted using an optical fiber and rotation stage (Newport, Irvine, CA USA, 481-A). The concentration factor under diffuse illumination (N-BK7 ground glass diffusers, 220 grit polish, Thorlabs, Newton, NJ USA) is measured with an identical setup. The solar cell operating temperature is measured by a thermal imaging camera (A325, FLIR, Wilsonville, OR USA).

Cost estimations

The manufacturing costs of solar cells grown by metal organic vapor phase epitaxy (MOVPE) on 6-inch-diameter round wafers are estimated based on the consideration of 24% cell efficiency, $150 per 6-inch wafer with a 27% area loss, 50 wafer reuses for both conventional ELO and ND-ELO processing, 30% and 20%group III and V precursor utilization yields, 15 µm h−1 growth rate, 70% CMP process yield, 9% margin and miscellaneous expenditures (material costs, labor, maintenance, utilities and equipment depreciation).17 Module material costs are estimated using existing crystalline Si manufacturing costs without considering the expenses for module assembly (e.g., depreciation and labor).18


Accelerated ND-ELO and laser dicing

Figure 1a shows the fabrication sequence of the thin-film GaAs solar cells via the combination of rapid ND-ELO and cold-weld bonding.9 The previously described ND-ELO method employs epitaxial protective layers grown between the sacrificial layer and the wafer that completely preserve the original wafer surface quality, even at the atomic scale, during the ELO process.9,10 Selective removal of the protective layers using wet chemical etching eliminates the need for the chemo-mechanical polishing used in conventional ELO. Therefore, ND-ELO allows for the nearly indefinite reuse of the GaAs substrates, converting their cost from a material expense into a capital investment. To accelerate the conventional ELO that takes several hours to separate the active epitaxy from even a small wafer, a 350-nm-thick Au layer deposited onto the epitaxial layer surface is photolithographically patterned to form a mask for the formation of an array of mesas separated by 500-µm-wide trenches by wet chemical etching that terminates at the active solar cell epitaxy/AlAs sacrificial layer interface (see the section on ‘Materials and Methods'). The bar-shaped solar cells provide approximately 21% higher utilization of the wafer active area compared with a single, square-shaped substrate cell (Supplementary Information SI 1).
Immediately following the mesa etching, the sample is cold-weld-bonded to a Cr/Au (4 nm/350 nm) coated 25 µm thick E-type Kapton® sheet, where the patterned Au on the wafer is used for the bonding interface. Then, the bonded sample is submerged in dilute, hot HF to lift-off etch the die in 30 min. This process takes >5 h for a 5-cm-diameter wafer using conventional ELO under similarly optimized etching conditions, corresponding to a >10× reduction in process time.9 Next, the lifted-off bars are fabricated into photovoltaic cells9 and then separated along the trenches using a CO2 laser scriber (see ‘Materials and Methods’ and Supplementary Information SI 1) with a kerf of ~300 µm.

Thermoforming of plastic-CPC and adhesive-free transfer printing

Figure 1b illustrates the thermoforming process used in fabricating the mini-CPCs. The process employs three molds: a metal mold to shape the thermoformed CPC, another for making an elastomeric stamp to transfer the solar cells onto the substrate, and a third to assist in solar cell alignment.
The process for fabricating the CPCs and integrating them with the solar cells is as follows: A 0.75 mm thick PETG sheet is employed for the concentrators due to its low glass transition temperature (81 °C), making it possible to shape by simultaneously applying heat and vacuum (see ‘Materials and Methods’).21 To transfer the diced, thin-film solar cells onto the thermoformed CPCs, an elastomeric PDMS stamp is prepared using an acrylonitrile butadiene styrene plastic mold (Figure 1c) shaped using a 3D printer. The CPC and Kapton® sheet beneath the solar cell strip are coated with Pd/Au (5 nm/100 nm) deposited through a shadow mask using electron beam evaporation. The solar cell strips are picked up by the PDMS stamp and transfer-printed onto the Au-coated plastic CPC via adhesive-free low-pressure cold-weld bonding (Figure 1c). A pyramid-shaped fixture is used to align the solar cell to the CPC without contacting its side walls (Supplementary Information SI 2). Subsequently, the CPC is coated by a 500-nm-thick reflective Ag layer using vacuum thermal evaporation while screening the solar cell with a shadow mask. The metallic mirror coating can potentially enhance the CPC reliability under ambient and solar illumination conditions. Figure 1d shows images of the CPC and thin-film GaAs solar cells at several stages of fabrication.

Characterization of the integrated CPC/thin-film GaAs solar cell assemblies

The CPC consists of two rotated half parabolas joined together to achieve an acceptance angle that is determined by their tilt angle. The application of CPCs for solar energy generation has thus far primarily focused on solar thermal energy conversion. In fact, the combination of CPCs with photovoltaic cells has, up to this point, been limited by their unwieldy form factor and high aspect ratios and production costs compared with lens or mirror-based concentrators. To overcome this shortcoming, we employed a highly truncated (>90%) design using low-cost plastic materials and fabrication processes. The combination of their high truncation ratios and half cylindrical symmetries enables concentration over a wide range of incident angles, thus completely eliminating the need for active tracking systems (Supplementary Information SI 3).
Figure 2a shows the current–voltage (I–V) characteristics of the thin-film GaAs solar cells measured under simulated AM 1.5 G illumination at 1 sun (100 mW cm−2) intensity, both in a conventional planar configuration and integrated with variously shaped thermoformed CPCs with a fixed aspect ratio of 4 (corresponding to 2.5-mm-wide solar cells with 10 mm high CPCs). The dependence of the concentration factor on the tilt angles of the axes of the parabolas, as inferred from the I–V characteristics, along with the calculated values, is provided inFigure 2b. A maximum concentration factor of 3.6 is achieved using a CPC with a 2.5° axis tilt. The ND-ELO processed solar cell performance has a PCE=18.4% and 17.9% with and without a 6° tilted CPC, respectively (Supplementary Information SI 4). The improved PCE using the concentrator is due to the increased open circuit voltage at a higher light intensity.
Figure 2.
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Performance of thin-film GaAs solar cells and plastic mini-CPCs (a) Current versus voltage (IV) characteristics of thin-film GaAs solar cells with and without various CPCs measured under 1 sun, AM 1.5 G simulated solar illumination. Inset shows the shape of each CPC along with their corresponding tilt angles. (b) Concentration factors depending on the tilt angle of the CPCs. Blue and green bars show simulated and measured concentration factors under AM 1.5 G solar illumination, respectively. (c) Light incident angle dependent concentration factors for thin-film GaAs solar cells integrated with 6° tilted plastic mini-CPCs. The green solid line shows the simulated value. Blue and red dots with guide lines show the measured concentration factors under direct and diffuse illumination, respectively. (d) Operating temperatures of thin-film and substrate-based GaAs solar cells under AM 1.5 G simulated solar illumination at 3.3 suns concentration, measured using an IR camera. The inset shows the cell IR camera images. CPC, compound parabolic concentrator; IR, infrared.
Full figure and legend (202K)

Figure 2c shows both the measured and the calculated values of the concentration factors as functions of the solar incidence angle for the 92%height-truncated, 6° tilted CPC under both direct and diffuse illumination. The 6° tilted CPC provides full concentration within ±6° from normal incidence. Light collection beyond this angle is enabled by the truncation of the CPC (Supplementary Information SI 3). Therefore, there is a sudden transition of the concentration factor at an incidence angle of 84° in Figure 2c. The measured peak concentration factor is 3.3, corresponding to 76% of the light incident on the concentrator aperture being directed onto the cell. The actual optical element also has an approximately 10° wider acceptance angle than calculated. Concentration losses are due to the rough light-scattering surfaces that result from the imperfect shape of the metal mold and distortions created by the non-uniform thermal expansion of the PETG during thermoforming.
The light concentration as a function of the incidence angle was also characterized under diffuse illumination (see ‘Materials and Methods’). As a result of the wide collector acceptance angle, the measured concentration factor has a maximum of 3.2 suns, which is nearly identical to that obtained for specular illumination at normal incidence (Figure 2c). The reduced sensitivity of the light concentration to solar position under diffuse, as well as direct sunlight confirms that the truncated CPC eliminates the need for active tracking.
The thermal performance of both substrate-based and thin-film GaAs solar cells under 3.3 suns concentration is shown in Figure 2d. Infrared images taken without heat sinking at an ambient temperature of 23.6 °C are shown in the inset. The thin-film cells are mounted onto a 700 nm thick Au film that is used for the contact, rear-side mirror, cold-weld bonding material and heat sink. The cells exhibit a 17 °C lower temperature under 1 sun illumination compared with analogous cells on a 350 µm thick GaAs substrate and a 41 °C lower operating temperature under 3 suns intensity (Supplementary Information SI 5, andSupplementary Movie, thermal performance). The near room temperature operation of thin-film solar cells is advantageous because every 10 °C increase leads to a decrease in the PCE of ~0.7%.24

Enhanced annual energy harvesting using CPC/thin-film GaAs solar cell assemblies

As noted, the mini-CPC is cylindrically symmetric, suggesting that it should be aligned along an east–west axis to provide the widest coverage of sunlight throughout the day simply by tilting its axis toward the zenith of the solar declination path, with only occasional seasonal adjustments to the tilt. The optimal seasonal alignments in Phoenix, AZ (33.4°N, 112.1°W), are provided inFigure 3a (Supplementary Information SI 6). We show the solar path at specific dates (1 January, 1 April and 1 July) and the coverage of the 6° tilted CPC at seasonally adjusted tilt angles (i.e., adjusted to zenith angles of 11°, 31° and 53.5° at the summer solstice, spring/fall equinoxes and the winter solstice, respectively).
Figure 3.
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Optimal alignment of CPCs for maximum annual energy harvesting. (a) Polar plots showing coverage of a CPC at its optimal seasonal positions. (b) Contour plot of daily and hourly concentration factors in Phoenix, AZ, USA, using a 6° tilted CPC. (c) Ratio of the daily concentrated energy harvesting factor for thin-film GaAs solar cells with a 6° tilted CPC compared to a cell without concentration. Inset: summary of annual power generation calculated from the integration of hourly and daily energy harvesting using thin-film GaAs solar cells with and without concentrators. CPC, compound parabolic concentrator.
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Figure 3b shows the daily and hourly trends of concentrated power generation using the 6° tilted CPC. The wide CPC acceptance angle allows for energy harvesting during the most useful hours of daylight straddling midday. Figure 3cshows the result of concentrated energy harvesting throughout the year using a thin-film GaAs solar cell with a 6° tilted CPC compared to conventional, non-concentrated cells. Both cases are calculated based on three seasonal positional adjustments each year. The inset of Figure 3c compares the annual energy generation of concentrated and non-concentrated thin-film GaAs solar cells. We find that the total annual energy yield is 2.8× higher for the concentrated cells.

Production cost estimation

Ultimately, the most important figure of merit for any solar cell technology is the cost of energy generation. Hence, Figure 4 shows the estimated cost reductions using the combination of approaches demonstrated here compared with conventional GaAs-based methods. We assume a 24% module efficiency and 50× wafer reuse for both conventional ELO with wafer polishing and the ND-ELO process. This analysis indicates an approximately 97% cost reduction using the ND-ELO thin-film GaAs solar cell integrated with a 6° tilted CPC compared with substrate-based cells and an 89% reduction compared with conventional ELO-processed thin-film solar cells. Here, 66% of the reduction is due to improved epitaxial-substrate utilization using ND-ELO and 25% is from the area reduction of 2.8× afforded by the mini-CPCs. The cost of CPC fabrication is estimated at <1%of the total module production cost (Supplementary Information SI 8). Ultimately, the costs can be dramatically reduced from $55.97/Wp for the current substrate-based single junction GaAs solar cells to only $0.34/Wp by employing ND-ELO processed cells integrated with mini-CPCs, representing a potential cost reduction of 99.4% (Supplementary Information SI 8). The production cost estimate for the thin-film GaAs solar cell/CPC assemblies satisfies the target of $0.5/Wp set by the US Department of Energy and is competitive with the current manufacturing cost of crystalline Si solar cell modules ($1.19/Wp$0.79/Wp). Furthermore, the lightweight module impacts the balance of the system cost by minimizing the expenses incurred upon installation and racking, thus making it adaptable to rooftop installations that may not be capable of supporting heavy, unwieldy modules and bulky, active solar tracking concentrator systems.
Figure 4.
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Comparison of production cost using thin-film GaAs solar cells integrated with CPCs. Comparison of solar cell production cost for the substrate-based, ELO-processed and ND-ELO-processed thin-film GaAs solar cell modules with and without the 6° tilted CPC. The percentages show the relative costs compared to a conventional non-lifted-off (substrate) cell lacking concentration. The inset shows the cost reduction for the major steps used in the fabrication of the ND-ELO processed thin-film GaAs solar cells integrated with CPCs compared with a non-concentrated substrate-based cell and a conventional ELO-processed cell. CPC, compound parabolic concentrator; ELO, epitaxial lift-off; ND-ELO, non-destructive epitaxial lift-off.
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In summary, we demonstrated thin-film GaAs solar cells integrated with low-cost, thermoformed, lightweight and wide acceptance angle mini-CPCs. The fabrication combines rapid ND-ELO thin-film cells that are cold-welded to a foil substrate and are subsequently attached to the CPCs in an adhesive-free transfer printing process. The combination of the low-temperature operation of the thin-film solar cells with the highly truncated low-profile plastic CPCs provides 2.8× enhanced energy harvesting throughout the year without the need for active solar tracking while eliminating losses incurred at the high operating temperatures characteristically encountered in concentration systems. Additionally, the combination of the potentially low cost fabrication and lightweight materials enables significant reductions in the balance of the system costs. This demonstration represents a significant step toward removing the cost barriers to the widespread deployment of lightweight and high performance thin-film GaAs solar cells in terrestrial and commercial solar electricity generation applications.