Nov 16, 2017

Thick orientation-patterned growth of GaP on wafer-fused GaAs templates by hydride vapor phase epitaxy for frequency conversion

Highlights

Successful heteroepitaxial growth of OPGaP on OPGaAs templates by HVPE.
First ever demonstration to produce 300 µm thick OPGaP layer on OPGaAs templates.
The quality of the commercially available GaP wafers is not a hindrance to further develop QPM devices.
The wafer fusion process is a viable and economical approach to produce OPGaAs templates.
OPGaP QPM devices are better suited for frequency conversion using the 1–2 µm pump sources because of smaller 2 PA in GaP.
The lack of absorption feature in the 2–4 µm range associated with n-doping GaP is a promising result for OPGaP growth.

Abstract

Quasi-phase-matched (QPM) GaP layers up to 300 μm thick have been produced by low-pressure hydride vapor phase epitaxy (LP-HVPE) overgrowth on orientation-patterned GaAs (OPGaAs) templates fabricated using a wafer-fusion bonding technique. The growth on the OPGaAs templates resulted in up to 200 μm thick vertically propagating domains, with a total GaP thickness of 300 μm. The successful thick growth on OPGaAs templates is the first step towards solving the material problems associated with unreliable material quality of commercially available GaP wafers and making the whole process of designing QPM frequency conversion devices molecular beam epitaxy free and more cost-effective.

Keywords

GaP;
GaAs;
Wafer fusion;
Hydride vapor phase epitaxy;
Nonlinear optical materials
Source:ScienceDirect

If you need more information about GaAs wafers,please visit our website:http://www.powerwaywafer.com,and send us email at angle.ye@powerwaywafer.com or powerwaymaterial@gmail.com.

Oct 30, 2017

Reflectivity modulator based on GaSb/GaAs heterostructure

Abstract

A structure of gallium antimonide (GaSb) and gallium arsenide (GaAs) wafers is built to modulate light reflectivity at CO2 laser wavelength. A quantum well composed of GaSb/GaAs heterojunction with highly doped GaAs up to 3×1018 cm-3 is inserted inside a layer structure. A grating of periodic structure of GaAs and gold layer is added just below the substrate. Gsolver software is used to determine the reflectivity of incident light with the existence of free carriers. A voltage is applied to the doped layer to deplete the free electrons and the reflectivity is determined again. The significant difference in reflectivity between the two cases can be used to build a light reflectivity modulator device.
Source:IOPscience
If you need more information about GaAs wafers,please visit our website:http://www.powerwaywafer.com,and send us email at angle.ye@powerwaywafer.com or powerwaymaterial@gmail.com.

Oct 23, 2017

New technique makes it easier to etch semiconductors

New technique makes it easier to etch semiconductors
This is a scanning electron microscope image of "nanopillars" etched in gallium arsenide via metal-assisted chemical etching. Credit: Xiuling Li

Creating semiconductor structures for high-end optoelectronic devices just got easier, thanks to University of Illinois researchers.

The team developed a method to chemically etch patterned arrays in the semiconductor gallium arsenide, used in solar cells, lasers, light emitting diodes(LEDs), field effect transistors(FETs), capacitors and sensors. Led by electrical and computer engineering professor Xiuling Li, the researchers describe their technique in the journal Nano Letter.
A semiconductor's physical properties can vary depending on its structure, so semiconductor wafers are etched into structures that tune their electrical and optical properties and connectivity before they are assembled into chips.
Semiconductors are commonly etched with two techniques: "Wet" etching uses a chemical solution to erode the semiconductor in all directions, while "dry" etching uses a directed beam of ions to bombard the surface, carving out a directed pattern. Such patterns are required for high-aspect-ratio nanostructures, or tiny shapes that have a large ratio of height to width. High-aspect-ratio structures are essential to many high-end optoelectronic device applications.
While silicon is the most ubiquitous material in semiconductor devices, materials in the III-V (pronounced three-five) group are more efficient in optoelectronic applications, such as solar cells or lasers.
New technique makes it easier to etch semiconductors
Metal-assisted chemical etching uses two steps. First, a thin layer of gold is patterned on top of a semiconductor wafer with soft lithography (left). The gold catalyzes a chemical reaction that etches the semiconductor form the top down, creating three-dimensional structures for optoelectronic applications (right). Credit: Xiuling Li

Unfortunately, these materials can be difficult to dry etch, as the high-energy ion blasts damage the semiconductor's surface. III-V semiconductors are especially susceptible to damage.
To address this problem, Li and her group turned to metal-assisted  (MacEtch), a wet-etching approach they had previously developed for silicon. Unlike other wet methods, MacEtch works in one direction, from the top down. It is faster and less expensive than many dry etch techniques, according to Li. Her group revisited the MacEtch technique, optimizing the chemical solution and reaction conditions for the III-V semiconductor gallium arsenide (GaAs).
The process has two steps. First, a thin film of metal is patterned on the GaAs surface. Then, the semiconductor with the metal pattern is immersed in the MacEtch chemical solution. The metal catalyzes the reaction so that only the areas touching metal are etched away, and high-aspect-ratio structures are formed as the metal sinks into the wafer. When the etching is done, the metal can be cleaned from the surface without damaging it.
"It is a big deal to be able to etch GaAs this way," Li said. "The realization of high-aspect-ratio III-V nanostructure arrays by wet etching can potentially transform the fabrication of semiconductor lasers where surface grating is currently fabricated by dry etching, which is expensive and causes surface damage."
To create metal film patterns on the GaAs surface, Li's team used a patterning technique pioneered by John Rogers, the Lee J. Flory-Founder Chair and a professor of materials science and engineering at the U. of I. Their research teams joined forces to optimize the method, called soft lithography, for chemical compatibility while protecting the GaAs surface. Soft lithography is applied to the whole semiconductor wafer, as opposed to small segments, creating patterns over large areas – without expensive optical equipment.
"The combination of soft lithography and MacEtch make the perfect combination to produce large-area, high-aspect-ratio III-V nanostructures in a low-cost fashion," said Li, who is affiliated with the Micro and Nanotechnology Laboratory, the Frederick Seitz Materials Research Laboratory and the Beckman Institute for Advanced Science and Technology at the U. of I.
Next, the researchers hope to further optimize conditions for GaAs etching and establish parameters for MacEtch of other III-V semiconductors. Then, they hope to demonstrate device fabrication, including distributed Bragg reflector lasers and photonic crystals.
"MacEtch is a universal method as long as the right condition for deferential  with and without metal can be found," Li said.

Source:phys
If you need more information about GaAs wafers,please visit our website:http://www.powerwaywafer.com,and send us email at angle.ye@powerwaywafer.com or powerwaymaterial@gmail.com.

Oct 20, 2017

AIXTRON Supplies Multiple MOCVD Cluster System to ROY LED Maker Nanchang Kingsoon

AIXTRON, a worldwide leading provider of deposition equipment to the semiconductor industry, announced today that Nanchang Kingsoon, a recently founded Chinese manufacturer of optoelectronic devices, has ordered multiple MOCVD cluster tools to expand manufacturing capacities in the area of gallium arsenide-based red, orange and yellow (ROY) LEDs and solar cells. All systems will be delivered in the course of the year.
Each production cluster consists of two multi-wafer AIX 2800G4-TM reactors with susceptor configurations of 15x4-inch in a recently enhanced system design. Customers such as Nanchang Kingsoon benefit from the platform’s maximized device yield and throughput, high precursor and hydride efficiencies as well as from lowest cost per wafer, in a recently enhanced system design.
“We are looking for a quick production ramp-up since market demand for ROY LEDs and solar cell components is picking up recently. Following an exhaustive search of the current MOCVD technologies for GaAs-based processes, we now exclusively rely on AIXTRON’s proven and high-performing AIX 2800G4-TM system for our wafer production. Since it is an extremely efficient manufacturing system, we are looking forward to benefit from its low cost of ownership”, says Mr. Zhang Yinqiao, General Manager of Nanchang Kingsoon.
Martin Goetzeler, AIXTRON’s Chief Executive Officer, comments: “We are particularly pleased about another new partnership with a promising semiconductor manufacturer and we are looking forward to accompany the company’s growth in the long run with our technology solutions.”
keywords:AIXTRON,Nanchang Kingsoon,MOCVD Cluster System,ROY LED,
Source:IOPscience
If you need more information about GaAs wafers,please visit our website:http://www.powerwaywafer.com,and send us email at angle.ye@powerwaywafer.com or powerwaymaterial@gmail.com.

Sep 25, 2017

Doubly passively Q-switched Nd:GGG laser with a monolayer graphene saturable absorber and GaAs wafer

Abstract

A doubly passively Q-switched Nd:GGG laser with monolayer graphene and GaAs wafer working as saturable absorbers is presented, in which the GaAs wafer also works as the output coupler. At the maximum incident pump power of 7.69 W, the obtained output power, the pulse duration and the pulse repetition rate are 820 mW, 1.06 ns, and 21.5 kHz, respectively, corresponding to pulse energy of 38.2 μJ and peak power of 35.9 kW, respectively.
Source:IOPscience
If you need more information about GaAs wafers,please visit our website:http://www.powerwaywafer.com,and send us email at angle.ye@powerwaywafer.com or powerwaymaterial@gmail.com.

Sep 6, 2017

Infineon Ships Industry's First CMOS RF Switches with GaAs Performance


Today Infineon Technologies announced it is shipping in volume the world’s first RF switches that are manufactured in a CMOS-based process on silicon wafers and offer the equivalent performance of RF switches manufactured in Gallium Arsenide (GaAs) process technology - a technology break-through that has never before been achieved. So far, CMOS-based RF switches had to be manufactured on dedicated, much more expensive sapphire wafers to reach the performance of GaAs switches.

The first CMOS RF switch of a whole new family, the BGS12A, is available in a fine-pitch Wafer-Level Package (WLP) with dimensions of only 0.79mm x 0.54mm, which is approximately 60 percent less printed circuit board (PCB) space compared to the smallest packaged GaAs RF switch on the market.

In many wireless products, including cellular phones, WLAN, WiMAX, GPS navigation systems, Bluetooth accessories or remote-keyless entry, RF switches are typically used to implement switching functions for receiving and transmitting (Rx/Tx) data, band select or antenna diversity applications and also enable worldwide roaming. On average, mobile devices are typically equipped with one RF switch. However, some multi-band multi-mode mobile phones are fitted with up to four RF switches.

“Infineon’s CMOS-based RF switches come in a tiny chip-scale package and require no further external components, such as level shifters, offering more space savings for various board designs,” said Michael Mauer, senior director, Silicon Discretes at Infineon Technologies. “With the increasing complexity of modern mobile devices, RF switches are expected to substitute today’s PIN diodes in the next five years.”

According to the US market research group Strategy Analytics, Boston, the worldwide market for RF switches accounted for approximately two billion pieces in 2006 and is expected to double to about four billion pieces by the year 2011.

The new Infineon RF switches are manufactured in a unique RF CMOS technology, combining the benefits of CMOS with outstanding RF performance, such as low insertion loss, low harmonic distortion, good isolation and high power levels. The inherent CMOS advantages include high integration capabilities, cost effectiveness and excellent electrostatic discharge (ESD) robustness. Compared to existing solutions, the CMOS-based RF switches offer the highest integration capabilities; are less expensive than GaAs devices; and allow higher battery life than PIN diodes, because current consumption is significantly reduced. All Infineon RF switches do not require external direct current (DC) blocking capacitors and integrate the complete control logic. CMOS compatible logic levels (1.4 V to 2.8 V) eliminate the need of external level shifters.

The BGS12A is Infineon’s first product in the new CMOS-based RF switches family. It is a general purpose single-pole double-throw (SPDT) RF switch designed for power levels of up to 20dBm, with a P -1dB above 30dBm. The new RF switch offers a high RF performance with an insertion loss of only 0.3dB at a frequency of 1.0GHz, low harmonic distortion, good isolation (34dB at 1.0GHz), and fast switching time of less than 4µs. The interfaces are protected against 1.5kV HBM (Human Body Model) ESD which improves the production yield of manufacturers of mobile device modules and achieves the required ESD levels. The BGS12A is ideal for use in low- and medium-power applications of up to 3GHz.

The BGS12A is available in volume quantities. Pricing starts at USD 0.70 per piece for quantities of 1,000 units.


Source:PHYS

If you need more information about GaAs wafers,please visit our website:http://www.powerwaywafer.com,and send us email at angle.ye@powerwaywafer.com or powerwaymaterial@gmail.com.

Aug 13, 2017

Structural and luminescent characteristics of porous GaAs

Abstract

In this paper, we present the results of structural and photoluminescence (PL) studies on porous layers produced on a heavily p-doped (100) GaAs wafer by electrochemical anodic etching. The evolution of porous GaAs structure as a function of layer preparation conditions were investigated by x-ray diffraction (XRD). We show that porous layers have the same crystallographic orientation as the substrate from which they are originated. We also report a relative XRD peak separation indicative of a variation of the lattice parameter of the porous layer. The photoluminescence of porous layers were characterized by a narrow emission band in the visible region attributed to the confinement effect in GaAs nanocrystals having a reduced size distribution. Chemical treatment in Sodium Carbonate solution was shown to enhance both the crystalline quality and the intensity ratio of visible to infrared emission of porous GaAs.

Keywords

Porous GaAs
Electrochemical etching
X-ray diffraction
Photoluminescence

Source:ScienceDirect

If you need more information about GaAs wafers,please visit our website:http://www.powerwaywafer.com,and send us email at angle.ye@powerwaywafer.com or powerwaymaterial@gmail.com.

Aug 10, 2017

Analysing the thermal-annealing-induced photoluminescence blueshifts for GaInNAs/GaAs quantum wells: a genetic algorithm based approach

Abstract

In this paper, we discuss two blueshift mechanisms that are present during the rapid thermal annealing of GaInNAs quantum wells (QWs). A GaInNAs/GaAs sample was grown using molecular beam epitaxy with a GaAs cap layer. Photoluminescence (PL) peak wavelengths from the QWs were measured for annealing temperatures, 680–800 °C, and annealing time up to 3 h. An experimental PL blueshift has been analysed for individual blueshift components due to the reorganization of the N-bonding configuration and the In/Ga interdiffusion across the QW interfaces, using a genetic algorithm based approach. It is found that the interdiffusion-induced blueshift is unaffected by the nitrogen-bonding configuration if the diffusion length is less than 2 nm. However, for larger diffusion lengths, the QW with gallium-rich N-bonding configuration shows a larger blueshift. Our calculations suggest the presence of N–Ga3In1 bonding configuration in the as-grown GaInNAs/GaAs QW, which changes to a mixture of N–Ga3In1 and N–Ga2In2 after annealing. The activation energy for short range order (SRO) is 2.38 eV, which is smaller than that for the interdiffusion process (3.196 eV), indicating that SRO is the dominant mechanism for the PL blueshift at low annealing temperatures and at the beginning of the annealing process.

Source:IOPscience

If you need more information about GaAs wafers,please visit our website:http://www.powerwaywafer.com,and send us email at angle.ye@powerwaywafer.com or powerwaymaterial@gmail.com.

Aug 1, 2017

Sandwich technique eases 3D optical chip fabrication

Sandwich technique eases 3D optical chip fabrication
Complex three-dimensional (3D) integrated circuits involving both optical and electronic elements are now easier to make, thanks to a “wafer bonding” technique developed by a European research consortium. With the right commercial backing, the new technology will help Europe stay competitive in communications and sensor technology.

Photonics is the science of controlling photons – the particles that make up light. Photonic devices are essential in telephone and computer networks, where they manage the flow of information along optical fibres. Pollution monitors, laser rangefinders, surgical lasers and DVD players are other examples of photonics in action.

Photonic devices are made on chips, in a similar way to electronic circuits, by combining elements such as laser diodes, waveguides and detectors. Some of these circuits use purely optical technology, but most are hybrids that include both photonic and electronic components.

The problem, as Helmut Heidrich of the Fraunhofer Institute for Telecommunications in Berlin explains, is that the growing complexity of these devices is pushing the limits of current manufacturing technology. In particular, photonic components are based on special semiconductors such as gallium arsenide (GaAs) or indium phosphide (InP), while most electronic components use silicon. Working with two fundamentally different materials on the same chip is difficult and expensive.

Instead of using two types of semiconductor in the same process, an alternative might be to fabricate separate slices, each made from one basic material, and then stick the slices together. In June 2004, a team of European scientists set out to show that this “wafer bonding” technique could be an effective way to make complex multi-layer photonic devices.

The EU-supported WAPITI project was coordinated by the Fraunhofer Institute for Telecommunications and had four other academic partners: Romania’s National Institute for R&D in Microtechnologies, the Max Planck Institute of Microstructure Physics in Germany, the University of Athens, and the University of Cambridge in the UK. A fifth partner, the E V Group (Austria), contributed its expertise in processing and machinery for full wafer bonding. WAPITI began in June 2004 and finished in September 2007.

Microring lasers


To show the potential of wafer bonding, the project partners set out to build optical elements known as active microring resonators. Microrings, which act as power storage devices, are a key part of the lasers which allow high-bandwidth communications signals to be spread across a wide range of laser frequencies. They also have great potential as wavelength converters for telecommunications, and in monitoring applications, such as the detection of biological or chemical substances.

Using InP and GaAs wafer substrates, the WAPITI team created various kinds of microrings with radii down to 10 µm. The two-layer technique allowed them to create microrings with vertical connections to the transparent waveguides that carry light in and out of the microrings. Compared to the standard technique of horizontal coupling on a single layer, vertical coupling allows the production of smaller microrings, which in turn means higher data rates. The researchers tested their microring lasers with several channels of wavelength division multiplexing, at data rates up to 7 Gbit/s.

Accurate alignment is one of the biggest challenges in wafer bonding. Each wafer is a slice of semiconductor material large enough to hold thousands of chips; only towards the end of the process are the individual chips separated and packaged. With the width of the smallest electronic circuit elements now down to 45 nm or less, accurate alignment across the whole wafer is crucial.

Maintaining alignment is hard enough over a single wafer, but even trickier when two wafers are made separately and then bonded. Different wafer materials have different rates of thermal expansion, so temperature changes during processing can distort the alignment of the tiny multilayer circuit elements.

Using electron beam lithography, the WAPITI partners achieved good results in aligning wafers of InP and GaAs 50 mm in diameter – currently the standard wafer size for these materials. Future development will bring the need to bond 50 mm InP and GaAs wafers to full-size (300 mm) silicon wafers. For this more difficult task, “step-and-repeat” masking techniques may replace the current system of fabricating each layer as a single unit, Heidrich believes.

Practical technology


Although the project did not include an end-user, Heidrich is confident that the technology developed during WAPITI is very marketable. The partners are now looking for a commercial company with an interest in taking their devices to the next level.
He is particularly upbeat about potential applications in environmental monitoring. Because of their small size, the microring lasers developed by the project have output powers of less than 1 mW, so they are not suitable for long-distance communications, which requires powers of 6-30 mW. Their high-quality resonators are, however, extremely sensitive to surface modifications, so they should have many applications as novel detectors for biological or chemical substances, Heidrich believes.

Source: ICT Results

If you need more information about Germanium wafers,please visit our website:http://www.powerwaywafer.com,and send us email at angle.ye@powerwaywafer.com or powerwaymaterial@gmail.com.

Jul 26, 2017

New method to make gallium arsenide solar cells

New method to make gallium arsenide solar cells
Image of a printed GaAs solar cell with a size ~10 x 10 mm2 on a glass substrate, with simple, metal grid contacts. Image copyright: Nature, DOI:doi:10.1038/nature09054

(PhysOrg.com) -- A new "transfer-printing" method of making light-sensitive semiconductors could make solar cells, night-vision cameras, and a range of other devices much more efficient, and could transform the solar industry.

Scientists at the University of Illinois at Urbana-Champaign have developed a new and cheaper way of producing microchips of  (GaAs), a compound semiconductor that responds to light. Gallium arsenide is about twice as effective as silicon in converting incident solar radiation to light, with a theoretical conversion rate of up to 40 percent, and has for that reason been used in solar cells in space crafts.

The problem with GaAs is its expense and the need for wafers to be grown in precisely controlled conditions. The wafers are sliced for use, but only the surfaces are used and the rest is essentially wasted. Now the Illinois research team, led by materials scientist John Rogers, has developed an alternative and potentially much more cost-effective technique involving growing stacks of layers of GaAs alternating with aluminum arsenide (AlAs).

When the stack is complete, the scientists then chemically etch away the AlAs layers using hydrofluoric acid, leaving the films of GaAs, which they then peel off and stamp onto another substrate such as glass, silicon, or plastic using a silicon-based soft rubber stamp. Rogers and his colleagues have been working on perfecting the technique for around ten years.
Semiconductor manufacturing technique holds promise for solar energy
This is a flexible array of gallium arsenide solar cells. Gallium arsenide and other compound semiconductors are more efficient than the more commonly used silicon. Credit: John Rogers

They have learned that if they press the stamp on the stack and lift it quickly it picks up only the top film. They then transfer the GaAs to the substrate by stamping it onto the surface and peeling the stamp back slowly. They could then build the devices such as , semiconductor field effect transistors and , and near-infrared imaging devices on the substrates. The method yields large quantities of high quality GaAs films, leaving the original wafer for reuse to grow more films.

Using their technique, which is described in the journal Nature, the researchers succeeded in mass-producing tiny solar cells about 500 micrometers in diameter, and they also produced components for mobile phones and infrared-imaging devices.

Rogers said GaAs has a great deal of potential in the future, and the team is now developing commercially viable  that will be able to generate electricity for about $1 per watt.
Semiconductor manufacturing technique holds promise for solar energy
A pile of gallium arsenide solar cells is manufactured in stacks and then peeled apart layer by layer. They can be integrated into a number of electronic devices. Credit: John Rogers

More information: Jongseung Yoon, GaAs photovoltaics and optoelectronics using releasable multilayer epitaxial assemblies, Nature, Volume: 465, Pages: 329-333, Date published: 20 May 2010, DOI:doi:10.1038/nature09054

Source: Phys
For more information, please visit our website: http://www.powerwaywafer.com,send us email at angel.ye@powerwaywafer.com or powerwaymaterial@gmail.com.


Jul 17, 2017

Thinking thin brings new layering and thermal abilities to the semiconductor industry

This image shows a thick bulk gallium nitride (GaN) crystal wafer (2 inches in diameter) with a GaN film in the foreground fabricated by controlled spalling (its film thickness is ~20 microns or 1/5th the thickness of a sheet of paper. Credit: Bedell/IBM Research

What would a simple technique to remove thin layers from otherwise thick, rigid 
semiconductor crystals mean for the semiconductor industry? This concept has been actively explored for years, as integrated circuits made on thin layers hold promise for developments including improved thermal characteristics, lightweight stackability and a high degree of flexibility compared to conventionally thick substrates.


In a significant advance, a research group from IBM successfully applied their new "controlled spalling" layer transfer technique to gallium nitride (GaN) crystals, a prevalent semiconductor material, and created a pathway for producing many layers from a single substrate.

As they report in the Journal of Applied Physics, controlled spalling can be used to produce thin layers from thick GaN crystals without causing crystalline damage. The technique also makes it possible to measure basic physical properties of the material system, like strain-induced optical effects and fracture toughness, which are otherwise difficult to measure.

Single-crystal GaN wafers are extremely expensive, where just one 2-inch wafer can cost thousands of dollars, so having more layers means getting more value out of each wafer. Thinner layers also provide performance advantages for power electronics, since it offers lower electrical resistance and heat is easier to remove.

"Our approach to thin film removal is intriguing because it's based on fracture," said Stephen W. Bedell, research staff member at IBM Research and one of the paper's authors. "First, we first deposit a nickel layer onto the surface of the material we want to remove. This nickel layer is under tensile strength—think drumhead. Then we simply roll a layer of tape onto the nickel, hold the substrate down so it can't move, and then peel the tape off. When we do this, the stressed nickel layer creates a crack in the underlying material that goes down into the substrate and then travels parallel to the surface."

Their method boils down to simply peeling off the tape, nickel layer and a thin layer of the substrate material stuck to the nickel.

"A good analogy of how remarkable this process is can be made with a pane of glass," Bedell said. "We're breaking the glass in the long direction, so instead of a bunch of broken glass shards, we're left with two full sheets of glass. We can control how much of the surface is removed by adjusting the thickness of the nickel layer. Because the entire process is done at room temperature, we can even do this on finished circuits and devices, rendering them flexible."

The group's work is noteworthy for multiple reasons. For starters, it's by far the simplest method of transferring thin layers from thick substrates. And it may well be the only layer transfer method that's materially agnostic.
The same 20-micron spalled GaN film, demonstrating the film's flexibility. Credit: Bedell/IBM Research

"We've already demonstrated the transfer of silicon, germanium, gallium arsenide, gallium nitride/sapphire, and even amorphous materials like glass, and it can be applied at nearly any time in the fabrication flow, from starting materials to partially or fully finished circuits," Bedell said.

Turning a parlor trick into a reliable process, working to ensure that this approach would be a consistent technique for crack-free transfer, led to surprises along the way.

"The basic mechanism of substrate spalling fracture started out as a 
materials science problem," he said. "It was known that metallic film deposition would often lead to cracking of the underlying substrate, which is considered a bad thing. But we found that this was a metastable phenomenon, meaning that we could deposit a thick enough layer to crack the substrate, but thin enough so that it didn't crack on its own—it just needed a crack to get started."

Their next discovery was how to make the crack initiation consistent and reliable. While there are many ways to generate a crack—laser, chemical etching, thermal, mechanical, etc.—it turns out that the simplest way, according to Bedell, is to terminate the thickness of the nickel layer very abruptly near the edge of the 
substrate.

"This creates a large stress discontinuity at the edge of the 
nickel film so that once the tape is applied, a small pull on the tape consistently initiates the crack in that region," he said.

Though it may not be obvious, 
gallium nitride is a vital material to our everyday lives. It's the underlying material used to fabricate blue, and now white, LEDs (for which the 2014 Nobel Prize in physics was awarded) as well as for high-power, high-voltage electronics. It may also prove useful for inherent biocompatibility, which when combined with control spalling may permit ultrathin bioelectronics or implantable sensors.

"Controlled spalling has already been used to create extremely lightweight, high-efficiency GaAs-based solar cells for aerospace applications and flexible state-of-the-art circuits," Bedell said.

The group is now working with research partners to fabricate high-voltage GaN devices using this approach. "We've also had great interaction with many of the GaN technology leaders through the Department of Energy's ARPA-E SWITCHES program and hope to use controlled spalling to enable novel devices through future partnerships," Bedell said.

Explore further: SOI wafers are suitable substrates for gallium nitride crystals
More information: S. W. Bedell et al, Layer transfer of bulk gallium nitride by controlled spalling, Journal of Applied Physics (2017). DOI: 10.1063/1.4986646 
Journal reference: Journal of Applied Physics 

Source: Phys
For more information, please visit our website: http://www.powerwaywafer.com,

send us email at angel.ye@powerwaywafer.com or powerwaymaterial@gmail.com.
 

Jul 9, 2017

Wafer-scale processing technology for monolithically integrated GaSb thermophotovoltaic device array on semi-insulating GaAs substrate

Abstract

This paper presents the entire fabrication and processing steps necessary for wafer scale monolithic integration of series interconnected GaSb devices grown on semi-insulating GaAs substrates. A device array has been fabricated on complete 50 mm (2 inch) diameter wafer using standard photolithography, wet chemical selective etching, dielectric deposition and single-sided metallization. For proof of concept of the wafer-scale feasibility of this process, six large-area series interconnected GaSb p–n junction thermophotovoltaic cells with each cell consisting of 24 small-area devices have been fabricated and characterized for its electrical connectivity. The fabrication process presented in this paper can be used for optoelectronic and electronic device technologies based on GaSb and related antimonide based compound semiconductors.
Keywords:GaAs,
Source: iopscience
For more information, please visit our website:www.powerwaywafer.com, send us email atsales@powerwaywafer.com  or powerwaymaterial@gmail.com.

Jul 7, 2017

Direct-bonded four-junction GaAs solar cells*

Abstract

Direct wafer bonding technology is able to integrate two smooth wafers and thus can be used in fabricating III–V multijunction solar cells with lattice mismatch. In order to monolithically interconnect between the GaInP/GaAs and InGaAsP/InGaAs subcells, the bonded GaAs/InP heterojunction must be a highly conductive ohmic junction or a tunnel junction. Three types of bonding interfaces were designed by tuning the conduction type and doping elements of GaAs and InP. The electrical properties of p-GaAs (Zn doped)/n-InP (Si doped), p-GaAs (C doped)/n-InP (Si doped) and n-GaAs (Si doped)/n-InP (Si doped) bonded heterojunctions were analyzed from the I–Vcharacteristics. The wafer bonding process was investigated by improving the quality of the sample surface and optimizing the bonding parameters such as bonding temperature, bonding pressure, bonding time and so on. Finally, GaInP/GaAs/InGaAsP/InGaAs 4-junction solar cells have been prepared by a direct wafer bonding technique with the high efficiency of 34.14% at the AM0 condition (1 Sun).
Keywords:GaAs,
Source: iopscience
For more information, please visit our website:www.powerwaywafer.com, send us email atsales@powerwaywafer.com  or powerwaymaterial@gmail.com.

Jun 30, 2017

Ferromagnetism at room temperature of c- and m-plane GaN : Gd films grown on different substrates by reactive molecular beam epitaxy

Abstract

We report the magnetic properties of c- and m-plane GaN : Gd films grown on different substrate materials. Additionally, we have investigated the magnetic behaviour of the bare substrates in order to analyse their possible contribution on the properties of this material system. For the growth of c-phase GaN : Gd we have used 6H–SiC(0 0 0 1) and GaN/Al2O3 templates. Whereas templates only exhibit a diamagnetic behaviour, the SiC substrates show clear signatures of ferromagnetism at room temperature. Rutherford backscattering spectroscopy and secondary ions mass spectrometry have revealed traces of Fe in the SiC substrates. This Fe contamination seems to be related to the ferromagnetic ordering observed in these substrates. LiAlO2(0 0 1) is a good choice for growth of m-plane diluted nitrides due to its diamagnetic behaviour. The hysteresis loops of c- and m-phase GaN : Gd deposited on template and LiAlO2, respectively, show coercivity and magnetic saturation. These characteristics together with the magnetization curves are indications of an intrinsic ferromagnetic behaviour in the GaN : Gd.
Source: iopscience
For more information, please visit our website:www.powerwaywafer.com, send us email atsales@powerwaywafer.com  or powerwaymaterial@gmail.com.

Radiative defect state identification in semi-insulating GaAs using photo-carrier Radiometry

Abstract

The photo-carrier radiometry (PCR) technique has been applied to a semi-insulating GaAs wafer for the detection and identification of radiative defects. Due to the ultrafast free carrier recombination lifetime, the conventional carrier-diffusion-wave-based PCR theory was modified to reflect the signal domination by trap emission and capture rates in the absence of diffusion. Defect photoluminescence with photon energies from 0.7 to 1.24 eV was collected and analyzed using photo-thermal temperature spectra and resonant (rate-window) detection combined with frequency scans. Five defect levels were identified self-consistently from the combined rate-window and PCR phase data, and the temperature dependence of the defect photoluminescence quantum efficiency was determined through multi-parameter best fits of the PCR rate theory to the experimental data.
Source: Iopscience
If you need more information about GaAs wafer,please visit our website: www.powerwaywafer.com or send us email to powerwaymaterial@gmail.com

Jun 27, 2017

Optical Mapping of the Total EL2-Concentration in Semi-Insulating GaAs-Wafers

In semi-insulating GaAs wafers the distribution of the total EL2, independent of its charge state, was determined by purely optical absorption measurements. In all (Czochralski-grown) wafers studied the radial distribution of the total EL2 is W-shaped and shows fourfold symmetry. So the fluctuations of the neutral EL2-concentration seen in the usual near infrared transmission mapping reflect essentially the inhomogeneity of the total EL2 distribution. The mean EL2+ concentration in all wafers was close to typical C- and Zn-concentrations in s.i. GaAs (≈ 2centerdot1015 cm-3).

Keywords:GaAs wafers; EL2;radial distribution;EL2-concentration;

Source:iopscience

If you need more information about GaAs wafer, please visit our website: http://www.powerwaywafer.com or send us email to  powerwaymaterial@gmail.com.